1. Field of the Invention
This invention relates to a dynamic semiconductor memory device, and more particularly to the arrangement of memory cells in a dynamic semiconductor memory device or the like.
2. Description of the Related Art
In recent years, with further development of the semiconductor technology, particularly, with further development of the fine patterning process in the semiconductor manufacturing process, the integration density of a so-called MOS dynamic semiconductor memory device (which is hereinafter referred to as DRAM) is rapidly enhanced. In order to attain a high integration density of the DRAM, it is necessary to densely arrange the memory cells with the least amount of space therebetween.
In FIG. 1, the layout of a cell array of folded bit line configuration is shown. In FIG. 1, word lines WL.sub.1 to WL.sub.8 are arranged to intersect bit lines BL.sub.1 to BL.sub.5 on a semiconductor substrate (not shown) and bit line contacts 1 are formed at a predetermined interval on each of the bit lines BL.sub.1 to BL.sub.5 with each of them lying between adjacent two of the word lines. In FIG. 1, the hatched portions indicate an active region 2.
It is assumed in the following description that the minimum featuring size is set to F and one word line pitch and one bit line pitch are each set to 2F which is twice the minimum featuring size.
As shown in FIG. 1, in the conventional cell array of folded bit line configuration, the minimum memory size becomes 8F.sup.2. That is, the minimum memory size is obtained by {two word line pitches (4F)}.times.{one bit line pitch (2F)}. The reason why the two word line pitches are necessary is that the passing word line is necessary in the folded bit line configuration.
FIG. 2 shows the layout of a cell array of open bit line configuration which does not require the passing word line as in the case of FIG. 1. In FIG. 2, portions which are the same as those of FIG. 1 are denoted by the same reference numerals and an explanation thereof is omitted.
As shown in FIG. 2, in the cell array of open bit line configuration, the cell array size is determined by 6F.sup.2 obtained by 1.5 word line pitch (3F).times.one bit line pitch (2F) including the field isolation region. Therefore, since the size of the cell array of open bit line configuration shown in FIG. 2 becomes 3/4 times the size of the cell array of folded bit line configuration shown in FIG. 1, a higher integration density can be attained in the open bit line configuration than in the folded bit line configuration.
However, the conventional open bit line configuration has the following problems.
A problem that the degree of freedom of the layout of a sense amplifier is small occurs. The reason is as follows. FIGS. 3 and 4 show the layouts of folded bit line configuration and open bit line configuration.
In the folded bit line configuration of FIG. 3, one sense amplifier can be arranged for every four bit line pitches (that is, 8F) by arranging sense amplifiers 4 on both sides of the cell array. In contrast, in the open bit line configuration, it becomes necessary to dispose a sense amplifier 4 in two bit line pitches (4F) as shown in FIG. 4. Therefore, in the open bit line configuration, the space for arrangement of sense amplifiers becomes small, making it difficult to design the sense amplifier.
As shown in FIG. 2, in the open bit line configuration, a space between the adjacent word lines is not constant and spaces of F and 3F are alternately provided. In the open bit line configuration, non-uniformity of spaces between the word lines causes a problem when a phase shift lithography method or the like is applied for patterning.
As described above, the layout of the conventional open bit line configuration has an advantage over the folded bit line configuration in that the cell area can be reduced to 75%. However, in the open bit line configuration, since the space of arrangement for the sense amplifiers becomes half in the bit line direction, the design for the sense amplifier becomes difficult, and since the spaces between word lines are not constant, the fine patterning process cannot be stably effected.